The invention relates to power semiconductor modules.
Conventional power semiconductor modules include one or more power semiconductor chips which are arranged on a plane ceramic substrate which includes a metallization on at least one side. At least one of such ceramic substrates is soldered to a metallic base plate of the module. To improve cooling, the base plate may be pressed against a heat sink.
The metallized ceramic substrates are pressed against the heat sink without a metallic base plate in between. To reduce the heat transmission resistance between the substrate and the heat sink, a layer of heat conductive paste is required. As the thermal conductivity of such a heat conductive paste is limited, the thickness of the layer of heat conductive paste needs to be very thin. However, apart from the locations to which downforce is applied to the substrates, the substrates tend to bend upwards, i.e. away from the heat sink. The result is a non-uniform thickness of the heat conductive paste.
To avoid this, the downforce is sought to be uniformly distributed over the substrate. For this, mechanical structures are provided to apply pressure onto the substrate all over the substrate area. However, due to the presence of semiconductor chips, bonding wires etc., the options to apply pressure all over the substrate area are limited.
In addition, on the top side of the metallized ceramic substrate, the metal layer is structured according to the power circuit requirements and the power semiconductor chips are arranged on the structured metal layer. For high electrical isolation (e.g., semiconductor blocking voltages ≧1700V) from the power circuit to the base plate, the rectangular cross section of the conductors and the sharp shape of the conductors at the edges and corners of the substrate provide an electric field that is inhomogeneous and significantly increased. Due to the sharp rectangular edge geometry, the electric field cannot be reduced significantly by a thicker ceramic layer. Power semiconductor modules for high voltage isolation have to pass an isolation voltage test (e.g., high pot test) of more than 4 kVrms and have to be free of partial discharges when applying voltages at and above 2 kVrms. For example, a 6.5 kV-IGBT-module has to pass a 10 kVrms isolation voltage test and has to be free of partial discharges at 5.2 kVrms.
For these and other reasons, there is a need for the present invention.